EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.
Features & Benefits
- Graphical design environment with automated generation of hierarchical VHDL or Verilog code
- Push-button import of legacy Verilog or VHDL designs and extraction of graphical hierarchy
- Adheres to state of the art Windows look and feel for intuitive operation
- Standards compliant (IEEE-1076-87&93 VHDL and IEEE-1364 Verilog)
- True multi-user design environment and associated version control, managed by a sophisticated design environment browser
- Integrates smoothly with the industry's most popular simulators and synthesis tools
- Platform independent database
- Integrated HDL language editor
- Hot error reporting
Features & Benefits
- Graphical design environment with automated generation of hierarchical VHDL or Verilog code
- Push-button import of legacy Verilog or VHDL designs and extraction of graphical hierarchy
- Adheres to state of the art Windows look and feel for intuitive operation
- Standards compliant (IEEE-1076-87&93 VHDL and IEEE-1364 Verilog)
- True multi-user design environment and associated version control, managed by a sophisticated design environment browser
- Integrates smoothly with the industry's most popular simulators and synthesis tools
- Platform independent database
- Integrated HDL language editor
- Hot error reporting
Download:
http://w14.easy-share.com/1702305149.html
Tidak ada komentar:
Posting Komentar